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What is the maximum PCIe TLP payload size your EndPoints can achieve?

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The PCIe TLP (Transaction Layer Packet) payload size determines the amount of data transmitted within each data packet to/from the Host (CPU) system/chipset and the PCIe device connected to it, for e.g. a PCIe switch or PCIe endpoint. The Maximum Payload Size (MPS) is determined by the BIOS/software, each device on the PCIe link reports the MPS it supports and the software typically configures the active MPS to the highest common value – for example if one device reports a supported MPS of 256B and the other device report supported MPS of 512B then the software shall typically configure the MPS to 256B but it can configure it to a lower value. This process is called “link training”. The default setting (found in the Mellanox INI file) for Mellanox ConnectX-3 ICs, and hence ConnectX-3 based HCAs (Host Card Adapters), is 256B. This is the value that Mellanox’s ConnectX-3 (PCIe endpoint) device “advertises” during the link training process. So, even if the CPU or PCIe switch connected to the ConnectX-3 device supports a larger MPS, this is the highest value the software can configure. Mellanox firmware currently supports 128B, 256B and 512B max payload size with future support for 1KB, 2KB and 4KB.

Poll Results
  • 128B (0%)
    0/0
  • 256B (0%)
    0/0
  • 512B (0%)
    0/0
  • 1KB or more (0%)
    0/0

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